QuestaSim or Questa Advanced Simulator software from Mentor GraphicIs provided for simulation, programming testing and debugging of FPGA and SoC chips. This program supports many hardware description languages such as Verilog, SystemVerilog, VHDL, SystemC, PSL and UPF, and with various tools that provide you with the ability to test the programming of the above chips before the actual design and implementation.
Gives. Questa Simulator is the core of Questa’s comprehensive simulation and debugging evaluation platform, which reduces the risk of evaluating these chips. Questa Sim covers many abstract layers from Transaction Level Modeling (TLM) to RTL, gates, transistors and for the design and evaluation of Soc and FPGA chips, as well as Evidence-Based Evaluation (ABV) evaluation method. Supports open (OVM) and comprehensive evaluation (UVM) methods to increase test productivity, automation, and reusability.
Features and specifications of QuestaSim software:
- High efficiency and support for several hardware description languages
- Efficient and advanced evaluations
- Easy to use and fast debugging
- Automatic production of tests
- Multi-core simulation and parallel testing
Windows 7/8/10 x86 / x64
In the Readme file in the Crack folder.
The Linux version has not been tested and its activation status is unknown.