1- Five Programmable Peripheral Interface
The 8255A is a basic function programmable I/O machine designed to switch the information from I/O to interrupt I/O underneath sure circumstances as required. It may be used with virtually any microprocessor.
It consists of three 8-bit bidirectional I/O ports (24I/O traces) which could be configured as per the requirement.
Ports of 8255A
8255A has three ports, i.e., PORT A, PORT B, and PORT C.
- Port A comprises one 8-bit output latch/buffer and one 8-bit enter buffer.
- Port B is much like PORT A.
- Port C could be cut up into two elements, i.e. PORT C decrease (PC0-PC3) and PORT C higher (PC7-PC4) by the management phrase.
- see also: Source Code / VCL 19.1.2
These three ports are additional divided into two teams, i.e. Group A consists of PORT A and higher PORT C. Group B consists of PORT B and decrease PORT C. These two teams could be programmed in three completely different modes, i.e. the primary mode is known as as mode 0, the second mode is known as as Mode 1 and the third mode is known as as Mode 2.
8255A has three completely different working modes −
- Mode 0 − On this mode, Port A and B is used as two 8-bit ports and Port C as two 4-bit ports. Every port could be programmed in both enter mode or output mode the place outputs are latched and inputs aren’t latched. Ports wouldn’t have interrupt functionality.
- Mode 1 − On this mode, Port A and B is used as 8-bit I/O ports. They are often configured as both enter or output ports. Every port makes use of three traces from port C as handshake indicators. Inputs and outputs are latched.
- Mode 2 − On this mode, Port A could be configured because the bidirectional port and Port B both in Mode Zero or Mode 1. Port A makes use of 5 indicators from Port C as handshake indicators for knowledge switch. The remaining three indicators from Port C can be utilized both as easy I/O or as handshake for port B.
Options of 8255A
The distinguished options of 8255A are as follows −
- It consists of three 8-bit IO ports i.e. PA, PB, and PC.
- Handle/knowledge bus should be externally demux’d.
- It’s TTL appropriate.
- It has improved DC driving functionality.
The next determine reveals the structure of 8255A −